In a conventional electronic apparatus having an imaging function, such as a digital still camera or a digital video camera, a solid-state imaging device like a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) image sensor is used. A solid-state imaging device has pixels each including a combination of a photodiode (PD) that performs photoelectric conversion and transistors, and an image is formed in accordance with pixel signals that are output from the pixels arranged in a two-dimensional fashion.
Also, these days, back-illuminated CMOS image sensors are often used. In a back-illuminated CMOS image sensor, light is emitted onto the PDs from the back surface side, which is the opposite side from the front surface side on which transistors and wiring layers are stacked on a semiconductor substrate.
In a CMOS image sensor, an image is normally taken in rolling shutter mode in which charge is sequentially transferred from PDs to floating diffusion (FD) units for each row of pixels. In recent years, however, CMOS image sensors that are capable of taking images in global shutter mode in which charge is transferred from PDs to FD units simultaneously from all the pixels have been developed.
Also, a structure in which a novel film material that serves as a photoelectric conversion unit and has a light blocking effect (such as CIGS: CuInGaS2) is stacked on a semiconductor substrate has been developed for back-illuminated CMOS image sensors in global shutter mode. In this structure, a charge accumulation unit that stores the charge generated in the photoelectric film is formed on the surface on the side of the photoelectric conversion film, and a memory unit and a signal processing transistor are formed on the surface on the side of the wiring layer of the semiconductor substrate. In this manner, area efficiency is increased. Also, for example, a vertical transistor is used in transferring charge from the charge accumulation unit to the memory unit (see Patent Document 1).
A global shutter operation can be performed with a structure using such a vertical transistor. In the structure, global resetting is performed via the FD unit and the memory unit after the charge in the memory unit is sequentially read out. Because of such a structure, the frame rate drops. To increase the frame rate, two vertical transistors are necessary, and therefore, the area efficiency of the CMOS image sensor becomes lower. Further, when the charge accumulation unit is saturated, the path for releasing the charge needs to be formed in the power supply on the wiring layer side or in adjacent pixels. As a result, the saturation charge amount might change, or the area efficiency might drop.
In addition, Patent Document 2 discloses a solid-state imaging device in which a photodiode is provided on the upper principal surface side in the Z-axis direction in a semiconductor substrate, and an accumulation diode is provided on the lower principal surface side in the Z-axis direction in the semiconductor substrate. In addition, Patent Document 3 discloses a solid-state imaging device in which a photoelectric conversion film is formed to prevent incident light from entering a readout circuit, an n-type impurity region, or the like.